A Distributed Cascode Power Amplifier with an Integrated Analog SIC Filter for Full-Duplex Wireless Operation in 65 nm CMOS
Author:
Affiliation:
1. Technion,Faculty of Electrical and Computer Engineering,Israel
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10186107/10186112/10186122.pdf?arnumber=10186122
Reference6 articles.
1. Hybrid Transformer-Based Tunable Differential Duplexer in a 90-nm CMOS Process
2. A Dual-Notch +27dBm Tx-Power Electrical-Balance Duplexer
3. A Four-Element 5-6-GHz CMOS Quadrature Balanced Full-Duplex MIMO Transmitter With Wideband Digital Interference Cancellation
4. Design and Analysis of an Electrical Balance Duplexer With Independent and Concurrent Dual-Band TX-RX Isolation
5. A Multiband RF Antenna Duplexer on CMOS: Design and Performance
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Balanced Distributed Cascode Power Amplifier With an Integrated Chebyshev Load Balancer for Full-Duplex Wireless Operation;IEEE Transactions on Microwave Theory and Techniques;2024
2. Fano-Bode Cancellation-Bandwidth Limit in Full-Duplex Wireless Transceivers;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
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