Performance Analysis and Architecture Design for Parallel EBCOT Encoder of JPEG2000-Reference-Cited by-同舟云学术

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Performance Analysis and Architecture Design for Parallel EBCOT Encoder of JPEG2000

Published:2007-10 Issue:10 Volume:17 Page:1336-1347
ISSN:1051-8215
Container-title:IEEE Transactions on Circuits and Systems for Video Technology
language:
Short-container-title:IEEE Trans. Circuits Syst. Video Technol.

Author:

Zhang Yi-Zhen,Xu Chao,Wang Wen-Tao,Chen Liang-Bin

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Media Technology

Link

http://xplorestaging.ieee.org/ielx5/76/4318237/04318255.pdf?arnumber=4318255

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. FPGA-based Auxiliary Minutest MQ-coder architecture of JPEG2000;Journal of Real-Time Image Processing;2017-03-21

3. A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000;Journal of Signal Processing Systems;2014-09-24

4. 2-Step Scalar Deadzone Quantization for Bitplane Image Coding;IEEE Transactions on Image Processing;2013-12

5. Hardware Implementation of Tier1 Coding for JPEG2000;Lecture Notes in Electrical Engineering;2012-11-06

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