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VLSI Implementation of HEVC Motion Compensation With Distance Biased Direct Cache Mapping for 8K UHDTV Applications

  • Published:2017-02 Issue:2 Volume:27 Page:380-393
  • ISSN:1051-8215
  • Container-title:IEEE Transactions on Circuits and Systems for Video Technology
  • language:
  • Short-container-title:IEEE Trans. Circuits Syst. Video Technol.

Author:

Wang Shihao,Zhou Dajiang,Zhou Jianbin,Yoshimura Takeshi,Goto Satoshi

Funder

Waseda University through the Graduate Program for Embodiment Informatics

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Media Technology

Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Bridging the Gap Between Voltage Over-Scaling and Joint Hardware Accelerator-Algorithm Closed-Loop;IEEE Transactions on Circuits and Systems for Video Technology;2022-01

2. Optimized LRU Algorithm for STT-MRAM/SRAM Hybrid Cache Architecture;2021 7th International Conference on Computer and Communications (ICCC);2021-12-10

3. A Cross-Layer Gate-Level-to-Application Co-Simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders;IEEE Transactions on Circuits and Systems for Video Technology;2020-10

4. VLSI Architecture of Block Matching Algorithms for Motion Estimation in High Efficiency Video Coding;Wireless Personal Communications;2020-01-22

5. High-Throughput Multifilter Interpolation Architecture for AV1 Motion Compensation;IEEE Transactions on Circuits and Systems II: Express Briefs;2019-05
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