A factorization method for FPGA implementation of sample rate converter for a multi-standard radio communications-Reference-Cited by-同舟云学术

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A factorization method for FPGA implementation of sample rate converter for a multi-standard radio communications

Published:2013-04 Issue: Volume: Page:
ISSN:
Container-title:IEEE 2013 Tencon - Spring
language:
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Author:

Agarwal Ashok,Boppana Lakshmi,Kodali Ravi Kishore

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6578010/6584396/06584501.pdf?arnumber=6584501

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Hardware optimized digital down converter for multi-standard radio receiver;Analog Integrated Circuits and Signal Processing;2024-01-11

2. Design and Implementation of a Nearly Nyquist Polyphase Filter Structure Sampling Rate Converter for 5G Systems;2023 5th International Academic Exchange Conference on Science and Technology Innovation (IAECST);2023-12-08

3. An error verification design of DDC based on MATLAB and FPGA;Third International Conference on Advanced Algorithms and Signal Image Processing (AASIP 2023);2023-10-10

4. Paper title: a highly efficient implementation of fractional sample rate digital down converter on FPGA;International Journal of Information Technology;2022-11-03

5. FPGA Implementation of Polyphase Digital Down Converter for WiMAX Systems;International Journal of Electronics Letters;2022-05-02

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