Five-level Hybrid T-type Inverter Topology with Mixed "Si+SiC" Semiconductor Device Configuration
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9478968/9478971/09479145.pdf?arnumber=9479145
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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5. Performance Evaluation of an Si+SiC based Hybrid VSI using a Modified Space Vector Switching Pattern in a Grid Connected Inverter Application;IECON 2022 – 48th Annual Conference of the IEEE Industrial Electronics Society;2022-10-17
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