FPGA implementation of histogram-based thresholding
Author:
Affiliation:
1. Institute of Electronics and Photonics, Slovak University of Technology,Bratislava,Slovakia
2. University of Montenegro,Faculty of Electrical Engineering,Podgorica,Montenegro
Funder
ECSEL Joint Undertaking (JU)
Horizon 2020 research programme
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9797068/9797069/09797132.pdf?arnumber=9797132
Reference19 articles.
1. Sobel Edge-based Image Template Matching in FPGA
2. A Distributed Canny Edge Detector: Algorithm and FPGA Implementation
3. FPGA Implementation of Distributed Canny Edge Detector for Low Clarity Images;rinjo;International Journal of Engineering and Innovative Technology,2016
4. FPGA Implementation of Edge Detection using Modified Canny Edge and Adaptive Threshold;nirmala;Journal of VLSI and Signal Processing,2017
5. Energy Efficient Canny Edge Detector for Advanced Mobile Vision Applications
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1. Comparison of Otsu's and Rosin's Methods for Threshold Determination;2023 12th Mediterranean Conference on Embedded Computing (MECO);2023-06-06
2. Design of real-time image processing system of medical high-definition electronic endoscope based on FPGA;2022 28th International Conference on Mechatronics and Machine Vision in Practice (M2VIP);2022-11-16
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