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Fast Montgomery Modular Multiplier using FPGAs

  • Published:2021 Issue: Volume: Page:1-1
  • ISSN:1943-0663
  • Container-title:IEEE Embedded Systems Letters
  • language:
  • Short-container-title:IEEE Embedded Syst. Lett.

Author:

Pajuelo-Holguera Francisco,Granado-Criado Jose M.,Gomez-Pulido Juan A.

Funder

Ministerio de Ciencia e Innovacin

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Computer Science,Control and Systems Engineering

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. GMC-crypto: Low latency implementation of ECC point multiplication for generic Montgomery curves over GF(p);Journal of Parallel and Distributed Computing;2024-11

2. An Eight-Term Karatsuba Multiplier for Cryptographic Hardware Primitives on FPGAs;2024 3rd International Conference on Advancement in Electrical and Electronic Engineering (ICAEEE);2024-04-25

3. Design and Evaluation of FPGA-Optimized Bangladesh Asymmetrical and Symmetrical Five-Term Karatsuba Multipliers;2024 3rd International Conference on Advancement in Electrical and Electronic Engineering (ICAEEE);2024-04-25

4. FPGA-Optimized Two-Term Karatsuba Multiplications for Large Integer Multiplications;2024 11th International Conference on Signal Processing and Integrated Networks (SPIN);2024-03-21

5. Area and Delay Trade-Offs in Three-Way Toom-Cook Large Integer Multipliers Implemented on FPGAs;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
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