Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors-Reference-Cited by-同舟云学术

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Towards a Better Lifetime for Non-volatile Caches in Chip Multiprocessors

Published:2017-01 Issue: Volume: Page:
ISSN:
Container-title:2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID)
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Author:

Agarwal Sukarn,Kapoor Hemangee K.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7880094/7884715/07884753.pdf?arnumber=7884753

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Self Adaptive Logical Split Cache Techniques for Delayed Aging of NVM LLC;ACM Transactions on Design Automation of Electronic Systems;2023-10-16

2. Lifetime Improvement of Non Volatile Memory Cache by Write Restriction;2023 IEEE 8th International Conference for Convergence in Technology (I2CT);2023-04-07

3. Enhancing the lifetime of STT-RAM using compression based wear leveling technique;Microelectronics Reliability;2023-04

4. Improving the Lifetime of Non-Volatile Cache by Write Restriction;IEEE Transactions on Computers;2019-09-01

5. Cache lifetime enhancement technique using hybrid cache-replacement-policy;Microelectronics Reliability;2019-06

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