1. Auxiliary State Machine Controlled Autonomous Design Verification Framework;2023 IEEE 41st VLSI Test Symposium (VTS);2023-04-24
2. Human- and Machine-Readable Requirements Formulation for Lab Verification Automation;2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS);2021-11-28
3. Feature Indented Assertions for Analog and Mixed-Signal Validation;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2016-11
4. Auxiliary Specifications for Context-Sensitive Monitoring of AMS Assertions;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2011-10