1. ARISTOTLE: Feature Engineering for Scalable Application-Level Post-Silicon Debugging;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-09
2. Enhanced ML-Based Approach for Functional Safety Improvement in Automotive AMS Circuits;2023 IEEE International Test Conference (ITC);2023-10-07
3. Efficient Hierarchical Post-Silicon Validation and Debug;2021 34th International Conference on VLSI Design and 2021 20th International Conference on Embedded Systems (VLSID);2021-02
4. In-Circuit Debugging with Dynamic Reconfiguration of FPGA Interconnects;ACM Transactions on Reconfigurable Technology and Systems;2020-03-31
5. Signal Selection Heuristics for Post-Silicon Validation;2020 21st International Symposium on Quality Electronic Design (ISQED);2020-03