A 16-b 320-kHz CMOS A/D converter using two-stage third-order Sigma Delta noise shaping
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx1/4/5719/00217978.pdf?arnumber=217978
Cited by 18 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Digital Noise-Cancellation Circuit Implementation Using Proposed Algorithm and Karnaugh Map in a MASH 2-1 Delta-Sigma Modulator;Journal of Circuits, Systems and Computers;2022-06-24
2. Frontiers, Trends and Challenges: Towards Next-generation ΣΔ Modulators;Sigma-Delta Converters;2018-09-03
3. Basics on Delta-Sigma Converters;Analog-Digital Converters for Industrial Applications Including an Introduction to Digital-Analog Converters;2015
4. Frontiers of ΣΔ Modulators: Trends and Challenges;CMOS Sigma-Delta Converters;2013-03-22
5. Delta–Sigma A/D Conversion Via Time-Mode Signal Processing;IEEE Transactions on Circuits and Systems I: Regular Papers;2009-09
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