Heuristics-Enabled High-Performance Application Mapping in Network-on-Chip based Multicore Systems
Author:
Affiliation:
1. Eastern Illinois University,Department of Mathematics and Computer Science,Charleston,IL 61920
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10189217/10189193/10189228.pdf?arnumber=10189228
Reference27 articles.
1. Smart hill climbing for agile dynamic mapping in many-core systems
2. Mappro: Proactive runtime mapping for dynamic workloads by quantifying ripple effect of applications on networks-on-chip;h;Proc NOCS,0
3. CoNA: Dynamic application mapping for congestion reduction in many-core systems
4. Multi-application multi-step mapping method for many-core network-on-chips;y;Proc NORCHIP,0
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. High-performance application mapping in network-on-chip-based multicore systems;The Journal of Supercomputing;2024-05-18
2. Application-Architecture Mapping for Energy-Efficiency and High-Performance in Network-on-Chip-Based Manycore Architectures;2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA);2024-04-22
3. IWO-IGA—A Hybrid Whale Optimization Algorithm Featuring Improved Genetic Characteristics for Mapping Real-Time Applications onto 2D Network on Chip;Algorithms;2024-03-10
4. A Survey on Dynamic Application Mapping Approaches for Real-Time Network-on-Chip-Based Platforms;IEEE Access;2023
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