The Use of Test Structures to Perform Chip Level Characterization Studies of Ni and NiFe Electrochemical Deposition-Reference-Cited by-同舟云学术

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The Use of Test Structures to Perform Chip Level Characterization Studies of Ni and NiFe Electrochemical Deposition

Published:2017-08 Issue:3 Volume:30 Page:243-253
ISSN:0894-6507
Container-title:IEEE Transactions on Semiconductor Manufacturing
language:
Short-container-title:IEEE Trans. Semicond. Manufact.

Author:

Murray Jeremy^ORCID,Perry Richard,Terry Jonathan G.,Smith Stewart^ORCID,Mount Andy,Walton Anthony J.^ORCID

Funder

Edinburgh Research Partnership in Engineering

EPSRC/IeMRC Smart Microsystems

Spirit Studentship

Texas Instruments

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/66/7997968/07976373.pdf?arnumber=7976373

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