An analytical delay expression for source-coupled FET logic (SCFL) inverters
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx3/16/8515/00372085.pdf?arnumber=372085
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3. Analytic transient solution of SCFL logic gates;International Journal of Circuit Theory and Applications;2005
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