1. Fast Constraints Tuning via Transfer Learning and Multiobjective Optimization;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-09
2. Statistical Hardware Design With Multimodel Active Learning;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-02
3. Logic Synthesis;FPGA EDA;2024
4. A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs;2023 IEEE 41st International Conference on Computer Design (ICCD);2023-11-06
5. Microarchitecture Design Space Exploration via Pareto-Driven Active Learning;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-11