A VLSI signal processor with complex arithmetic capability-Reference-Cited by-同舟云学术

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A VLSI signal processor with complex arithmetic capability

Published:1988-05 Issue:5 Volume:35 Page:495-505
ISSN:0098-4094
Container-title:IEEE Transactions on Circuits and Systems
language:
Short-container-title:IEEE Trans. Circuits Syst.

Author:

Barazesh B.,Michalina J.-C.,Picco A.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering

Link

http://xplorestaging.ieee.org/ielx1/31/110/00001776.pdf?arnumber=1776

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An implementation of lattice filters using four operands Real Multiply Accumulation;J CIRCUIT SYST COMP;2002

2. AN IMPLEMENTATION OF LATTICE FILTERS USING FOUR OPERANDS REAL MULTIPLY ACCUMULATION;Journal of Circuits, Systems and Computers;2002-04

3. Pipeline interleaving design for FIR, IIR, and FFT array processors;Journal of VLSI signal processing systems for signal, image and video technology;1995-10

4. A hybrid number system processor with geometric and complex arithmetic capabilities;IEEE Transactions on Computers;1991

5. An effective processing on a digital signal processor with complex arithmetic capability;IEEE. APCCAS 1998. 1998 IEEE Asia-Pacific Conference on Circuits and Systems. Microelectronics and Integrating Systems. Proceedings (Cat. No.98EX242)

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