Implementation of Fractional Sample Rate Digital Down Converter for Radio Receiver Applications
Author:
Publisher
IEEE
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http://xplorestaging.ieee.org/ielx7/9455757/9455759/09455805.pdf?arnumber=9455805
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design and Implementation of a Nearly Nyquist Polyphase Filter Structure Sampling Rate Converter for 5G Systems;2023 5th International Academic Exchange Conference on Science and Technology Innovation (IAECST);2023-12-08
2. An error verification design of DDC based on MATLAB and FPGA;Third International Conference on Advanced Algorithms and Signal Image Processing (AASIP 2023);2023-10-10
3. Area and power-efficient reconfigurable digital down converter on FPGA;Facta universitatis - series: Electronics and Energetics;2022
4. Design of Decimation Filter With Improved Magnitude Characteristic and Low Complexity;IEEE Access;2022
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