A 27.2–31.2 GHz 92-fs rms Integrated Jitter, Fractional-<i>N</i> Subsampling PLL Using Phase Rotating Technique in 65-nm CMOS-Reference-Cited by-同舟云学术

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A 27.2–31.2 GHz 92-fs rms Integrated Jitter, Fractional-N Subsampling PLL Using Phase Rotating Technique in 65-nm CMOS

Published:2023-12 Issue:12 Volume:71 Page:5182-5193
ISSN:0018-9480
Container-title:IEEE Transactions on Microwave Theory and Techniques
language:
Short-container-title:IEEE Trans. Microwave Theory Techn.

Author:

Kim Gwang Sub¹^ORCID,Ryu Si-Keuk¹,Ko Goo-Han¹^ORCID,Oh Kwang-Il¹^ORCID,Baek Donghyun¹^ORCID

Affiliation:

1. Department of Electronic and Electrical Engineering, Chung-Ang University, Seoul, South Korea

Funder

Chung-Ang University Graduate Research Scholarship in 2020

Institute for Information and Communications Technology Planning and Evaluation

Korean Government [Ministry of Science and Information and Communications Technologies (ICT) (MSIT)]

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Radiation

Link

http://xplorestaging.ieee.org/ielx7/22/10345395/10142159.pdf?arnumber=10142159

Reference31 articles.

1. A Low Noise Sub-Sampling PLL in Which Divider Noise is Eliminated and PD/CP Noise is Not Multiplied by $N ^{2}$

2. AMASS PLL: An Active-Mixer-Adopted Sub-Sampling PLL Achieving an FOM of −255.5DB and a Reference Spur of −66.6DBC

3. A Sub-mW 2.4-GHz Active-Mixer-Adopted Sub-Sampling PLL Achieving an FoM of -256 dB

4. A 2.4–3.0GHz Process-Tolerant Sub-Sampling PLL With Loop Bandwidth Calibration

5. A 0.65-V 12-16-GHz Sub-Sampling PLL With 56.4-fsrms Integrated Jitter and -256.4-dB FoM

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 27-39 GHz Fractional-N PLL For 5G mm-Wave Communication With Improved Extended Range Multi-Modulus Divider;2023 Asia-Pacific Microwave Conference (APMC);2023-12-05

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