A 0.35-mW 70-GHz Self-Resonant E-TSPC Frequency Divider With Backgate Adjustment

Author:

Tibenszky Zoltan1ORCID,KreiBig Martin1ORCID,Carta Corrado1,Ellinger Frank1ORCID

Affiliation:

1. Chair of Circuit Design and Network Theory, Technische Universität Dresden, Dresden, Germany

Funder

Sächsisches Staatsministerium für Wissenschaft, Kultur und Tourismus

Sächsische Aufbaubank (SAB) in the frame of the PROSECCO Project

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Radiation

Reference61 articles.

1. Design of a 12 GHz low-power extended true single phase clock (E-TSPC) prescaler in 0.13 $\mu$ m CMOS technology;jung;Proc IEEE Asia–Pacific Microw Conf,2011

2. A 36 GHz/mW single-phase prescaler using implication logic in 0.13 $\mu$m CMOS;roa;Proc IEEE Radio Freq Integr Circuits Symp (RFIC),2013

3. A 1–60 GHz 9.6 mW 0.18 V Output-Swing Static Clock Divider Circuit in 45-nm SOI CMOS

4. A low-power mmWave CML prescaler in 65 nm SOI CMOS technology;kim;IEEE Compound Semiconductor Integrated Circuit Symp,2008

5. A 440-$\mu$ w 60-GHz injection-locked frequency divider in 65 nm CMOS;chao;Proc IEEE Radio Freq Integr Circuits Symp (RFIC),2013

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