A 0.5-to-3.5-GHz Full-Duplex Mixer-First Receiver With Cartesian Synthesized Self-Interference Suppression Interface in 65-nm CMOS-Reference-Cited by-同舟云学术

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A 0.5-to-3.5-GHz Full-Duplex Mixer-First Receiver With Cartesian Synthesized Self-Interference Suppression Interface in 65-nm CMOS

Published:2020-06 Issue:6 Volume:68 Page:1995-2010
ISSN:0018-9480
Container-title:IEEE Transactions on Microwave Theory and Techniques
language:
Short-container-title:IEEE Trans. Microwave Theory Techn.

Author:

Ershadi Ali^ORCID,Entesari Kamran^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Radiation

Link

http://xplorestaging.ieee.org/ielx7/22/9108315/09088219.pdf?arnumber=9088219

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Enhanced-Linearity Wideband Full-Duplex Receiver With Shared Self-Interference Canceller;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-09

2. Demo: Experimentation with Wideband Real-Time Adaptive Full-Duplex Radios;Proceedings of the ACM SIGCOMM 2023 Conference;2023-09

3. Analysis and Design of a Non-Magnetic Bulk CMOS Passive Circulator Using 25% Duty-Cycle Clock;Micromachines;2022-12-23

4. Self-Interference Cancellation: A Comprehensive Review from Circuits and Fields Perspectives;Electronics;2022-01-06

5. A Full-Duplex Rake Receiver Using RF Code-Domain Signal Processing for Multipath Environments;IEEE Journal of Solid-State Circuits;2021-10

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