Junctionless Nanowire Transistor for Analog Applications: Cascode Current Mirror Configuration
Author:
Affiliation:
1. Centro Universitário FEI,Electrical Engineering Department,São Bernardo do Campo,Brazil
2. Universidade Federal do ABC, UFABC,Santo André,Brazil
Funder
São Paulo Research Foundation (FAPESP)
National Council for Scientific and Technological Development (CNPq)
Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - Brasil (CAPES)
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9880925/9880936/09881034.pdf?arnumber=9881034
Reference16 articles.
1. Study of analog performance of common source amplifier using rectangular core–shell based double gate junctionless transistor
2. Junctionless Nanowire Transistors Based Common-Source Current Mirror
3. Junctionless Nanowire Transistors Based Wilson Current Mirror Configuration
4. Scaling of Trigate Junctionless Nanowire MOSFET With Gate Length Down to 13 nm
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Junctionless Transistors Based Current Mirrors: Analog Figures of Merit Dependence on the Devices Width;2023 37th Symposium on Microelectronics Technology and Devices (SBMicro);2023-08-28
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