Efficient Approximate 8-Bit Binary Parallel Subtractor Circuit: Design, Analysis, and Application in Negative Image Generation
Author:
Affiliation:
1. Motilal Nehru National Institute of Technology Allahabad,Department of Electronics and Communication Engineering,Prayagraj,Uttar Pradesh,India,211004
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10440964/10440724/10441541.pdf?arnumber=10441541
Reference14 articles.
1. A Survey on Techniques used in Medical Imaging Processing
2. Approximate Subtractor Operator for Low-Power Video Coding Hardware Accelerators
3. Approximate Arithmetic Circuits: A Survey, Characterization, and Recent Applications
4. Approximate Arithmetic Circuit Design Using a Fast and Scalable Method
5. Design of Novel CMOS Based Inexact Subtractors and Dividers for Approximate Computing: An In-Depth Comparison with PTL Based Designs
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