A High-Speed DSP Engine for First-Order Hold Digital Phase Modulation in 28-nm CMOS-Reference-Cited by-同舟云学术

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A High-Speed DSP Engine for First-Order Hold Digital Phase Modulation in 28-nm CMOS

Published:2018-12 Issue:12 Volume:65 Page:1959-1963
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Roverato Enrico^ORCID,Kosunen Marko^ORCID,Lemberg Jerry^ORCID,Martelius Mikko^ORCID,Stadius Kari^ORCID,Anttila Lauri^ORCID,Valkama Mikko^ORCID,Ryynanen Jussi^ORCID

Funder

Nokia

Finnish Funding Agency for Technology and Innovation

European Union’s Horizon 2020 Research and Innovation Programme under the Marie Sklodowska-Curie

Academy of Finland

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/8543340/08323215.pdf?arnumber=8323215

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Outphasing Architecture Based on Parallel Radio Frequency–Pulse Width Modulation Method for All-Digital Transmitter;Electronics;2024-01-06

2. Digital Interpolating Phase Modulator Implementation for Outphasing PA;2020 18th IEEE International New Circuits and Systems Conference (NEWCAS);2020-06

3. A 1.5–1.9-GHz All-Digital Tri-Phasing Transmitter With an Integrated Multilevel Class-D Power Amplifier Achieving 100-MHz RF Bandwidth;IEEE Journal of Solid-State Circuits;2019-06

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