A Transistor-Level DFF Based on FinFET Technology for Low Power Integrated Circuits-Reference-Cited by-同舟云学术

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A Transistor-Level DFF Based on FinFET Technology for Low Power Integrated Circuits

Published:2022-02 Issue:2 Volume:69 Page:584-588
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Wang Jun,Zhu Haozhou^ORCID,Yu Yang^ORCID,Liu Xu,Feng Eryuan,Lei Chuanzhen,Cai Yanfei,Zhu Hao^ORCID,Sun Qing-Qing^ORCID,Zhang David Wei

Funder

NSFC

National Major Projects of Science and Technology

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/9695534/09480670.pdf?arnumber=9480670

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Investigative Study on Performance and Reliability Effects on S2C/TSPC/SCD D-Flip-Flops using 16 nm CMOS Process;2024 IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI);2024-03-14

2. DNN-Based Optimization to Significantly Speed Up and Increase the Accuracy of Electronic Circuit Design;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-03

3. An Efficient Design of a Parallel Prefix Adder based on QCA Technology;IETE Journal of Research;2023-10-15

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