A High-Speed FPGA-Based True Random Number Generator Using Metastability With Clock Managers
Author:
Affiliation:
1. Department of Informatics, Modelling, Electronics and Systems Engineering, University of Calabria, Rende, Italy
2. Department of Mechanical, Energy and Management Engineering, University of Calabria, Rende, Italy
Funder
“PON Ricerca & Innovazione—Ministero dell’Università e della Ricerca
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/10032206/09908167.pdf?arnumber=9908167
Reference23 articles.
1. Design of True Random Number Generator Based on Multi-stage Feedback Ring Oscillator
2. TROT: A Three-Edge Ring Oscillator Based True Random Number Generator With Time-to-Digital Conversion
3. An Analysis of DCM-Based True Random Number Generator
4. An Improved DCM-Based Tunable True Random Number Generator for Xilinx FPGA
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