Analysis of SAR ADC Performance Enhancement Utilizing Stochastic Resonance-Reference-Cited by-同舟云学术

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Analysis of SAR ADC Performance Enhancement Utilizing Stochastic Resonance

Published:2023-12 Issue:12 Volume:70 Page:4324-4328
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Shibata Ryoya¹,Hotta Yasushi²,Tabata Hitoshi³,Iizuka Tetsuya⁴^ORCID

Affiliation:

1. Department of Electrical Engineering and Information Systems, The University of Tokyo, Tokyo, Japan

2. Department of Electrical Materials and Engineering, University of Hyogo, Kobe, Hyogo, Japan

3. Department of Bioengineering, The University of Tokyo, Tokyo, Japan

4. Systems Design Lab, School of Engineering, The University of Tokyo, Tokyo, Japan

Funder

Institute for AI and Beyond, The University of Tokyo

JST, CREST

KAKENHI

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/10349118/10173546.pdf?arnumber=10173546

Reference17 articles.

1. A 10b/12b 40 kS/s SAR ADC With Data-Driven Noise Reduction Achieving up to 10.1b ENOB at 2.2 fJ/Conversion-Step

2. A 0.7-V 0.6- $\mu \text{W}$ 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction

3. A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques

4. A Second-Order Noise-Shaping SAR ADC With Passive Integrator and Tri-Level Voting

5. Stochastic Resonance Mixed-Signal Processing: Analog-to-Digital Conversion and Signal Processing Employing Noise

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