Delay Cell for Highly-Linear Current-Controlled Oscillator-Based Analog-to-Digital Conversion
Author:
Affiliation:
1. Electronics Technology Department, Carlos III University of Madrid, Madrid, Spain
2. Department of Electrical Engineering (ESAT), MICAS Laboratory, Katholieke Universiteit Leuven, Leuven, Belgium
Funder
HiSilicon Sponsorship Program for MPW Prototyping
Spanish Agency of Research
Research Office of Carlos III University, Madrid, Spain
Flemish FWO
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/10235305/10102923.pdf?arnumber=10102923
Reference11 articles.
1. A VCO-Based ADC With Direct Connection to a Microphone MEMS, 80-dB Peak SNDR and 438-μW Power Consumption
2. Analysis and design of voltage-controlled oscillator based analog-to-digital converter;kim;IEEE Trans Circuits Syst I Reg Papers,2010
3. Highly linear VCO for use in VCO‐ADCs
4. A Noise-Shaped VCO-Based Nonuniform Sampling ADC With Phase-Domain Level Crossing
5. Time-Encoding Analog-to-Digital Converters: Bridging the Analog Gap to Advanced Digital CMOS-Part 1: Basic Principles
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1. A Model & Design Methodology for Dead Time Linearised Current Controlled Ring Oscillator ADCs;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-09
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