An Ising Model-Based Annealing Processor With 1024 Fully Connected Spins for Combinatorial Optimization Problems-Reference-Cited by-同舟云学术

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An Ising Model-Based Annealing Processor With 1024 Fully Connected Spins for Combinatorial Optimization Problems

Published:2023-08 Issue:8 Volume:70 Page:3074-3078
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Huang Zhanhong¹^ORCID,Jiang Dong¹^ORCID,Wang Xiangrui¹^ORCID,Yao Enyi¹^ORCID

Affiliation:

1. School of Microelectronics, South China University of Technology, Guangzhou, China

Funder

Basic and Applied Basic Research Foundation of Guangdong Province

Guangzhou Basic and Applied Basic Research Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/10198497/10054461.pdf?arnumber=10054461

Reference20 articles.

1. Annealing Processing Architecture of 28-nm CMOS Chip for Ising Model With 512 Fully Connected Spins

2. 2.6 A 2 ×30k-Spin Multichip Scalable Annealing Processor Based on a Processing-In-Memory Approach for Solving Large-Scale Combinatorial Optimization Problems

3. An accelerator architecture for combinatorial optimization problems;tsukamoto;Fujitsu Sci Technol J,2017

4. STATICA: A 512-Spin 0.25M-Weight Annealing Processor With an All-Spin-Updates-at-Once Architecture for Combinatorial Optimization With Complete Spin–Spin Interactions

5. Temporal and spatial parallel processing of simulated quantum annealing on a multicore CPU

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