An Analytical MOS Device Model With Mismatch and Temperature Variation for Subthreshold Circuits
Author:
Affiliation:
1. Department of Electrical Engineering, Stanford University, Stanford, CA, USA
2. Department of Bioengineering and Electrical Engineering, Stanford University, Stanford, CA, USA
Funder
ONR
Sang Samuel Wang Stanford Graduate Fellowship
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/10138208/10005201.pdf?arnumber=10005201
Reference21 articles.
1. Temperature Sensitivity and Compensation on a Reconfigurable Platform
2. CMOS Analog Design Using All-Region MOSFET Modeling
3. Electrical Properties of Silicon Containing Arsenic and Boron
4. Braindrop: A Mixed-Signal Neuromorphic Architecture With a Dynamical Systems-Based Programming Model
5. Leti-UTSOI2.1: A Compact Model for UTBB-FDSOI Technologies—Part I: Interface Potentials Analytical Model
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