Improved Dual Boost Mid-Point Clamped Five-Level Inverter Topology-Reference-Cited by-同舟云学术

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Improved Dual Boost Mid-Point Clamped Five-Level Inverter Topology

Published:2024-06 Issue:6 Volume:71 Page:3221-3225
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Sathik M. Jagabar¹^ORCID,Gopinath N. P.¹^ORCID,Hota Arpan²^ORCID,Vijayakumar K.¹^ORCID,Mekhilef Saad³^ORCID,Agarwal Vivek²^ORCID

Affiliation:

1. Department of Electrical and Electronics Engineering, SRM Institute of Science and Technology (Kattankulathur), Chennai, India

2. Electrical Engineering Department, Indian Institute of Science and Technology Bombay, Mumbai, India

3. School of Science, Computing and Engineering Technologies, Swinburne University of Technology, Hawthorn, VIC, Australia

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/8920/10561573/10409612.pdf?arnumber=10409612

Reference16 articles.

1. A Survey on Neutral-Point-Clamped Inverters

2. New five-level active neutral point clamped converter

3. Operation and Control of a Nine-Level Modified ANPC Inverter Topology With Reduced Part Count for Grid-Connected Applications

4. AMid-Point Clamped Five-Level Inverter With Limited Switched-Capacitor Inrush Current For PV Applications

5. Design of a SiC-based Five-Level Stacked Multicell Converter for High-Speed Motor Drives

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