An Area-Efficient FPGA Implementation of a Real-Time Multi-Class Classifier for Binary Images
Author:
Affiliation:
1. Department of Electrical and Computer Engineering, University of Victoria, Victoria, BC, Canada
Funder
University of Victoria doctoral fellowship
NSERC Discovery Grant 36401
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/9741739/09698411.pdf?arnumber=9698411
Reference26 articles.
1. Kernel methods and their potential use in signal processing
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3. Binarization based implementation for real-time human detection
4. Improved binary HOG algorithm and possible applications in car detection
5. An area-efficient FPGA implementation of a real-time binary object detection system;attarmoghaddam;Proc Int Conf Netw Based Inf Syst,2020
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