NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN-Reference-Cited by-同舟云学术

NVP: A Flexible and Efficient Processor Architecture for Accelerating Diverse Computer Vision Tasks including DNN

Published:2023-01 Issue:1 Volume:70 Page:271-275
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Liu Ye¹^ORCID,Wu Fei¹,Zhao Neng¹,Zhang Qirong²,Wang Wenqiang²,Yang Yutong¹,Li Xiangting¹,Li Sixu¹^ORCID,Huang Zili¹,Hao Shuang¹,Ou Guangbin¹,Zhou Liang¹^ORCID,Chang Liang¹^ORCID,Lin Shuisheng¹^ORCID,Xu Ningyi³,Zhou Jun¹^ORCID

Affiliation:

1. School of Information and Communication Engineering, University of Electronic Science and Technology of China, Chengdu, China

2. Chip Design Department, SenseTime Research and PowerTensor.AI, Chengdu, China

3. Qingyuan Research Institute, Shanghai Jiaotong University, Shanghai, China

Funder

National Nature Science Foundation of China

National Safety Academic Fund

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/9996096/09893156.pdf?arnumber=9893156

Reference20 articles.

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Strategic Game Model for AUV-Assisted Underwater Acoustic Covert Communication in Ocean Internet of Things;IEEE Internet of Things Journal;2024-06-15

2. AC-DNN: An Adaptive Compact DNNs Architecture for Collaborative Learning Among Heterogeneous Smart Devices;IEEE Internet of Things Journal;2024-06-15

3. TENG: A General-Purpose and Efficient Processor Architecture for Accelerating DNN;2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS);2024-04-22