Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
57 articles.
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1. Heuristic Logic Resynthesis Algorithms at the Core of Peephole Optimization;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11
2. A Block Partitioning Method for Region Exhaustive Test to Reduce the Number of Test Patterns and Improve Gate Exhaustive Fault Coverage;2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2023-10-03
3. Machine-Learning Based Delay Prediction for FPGA Technology Mapping;Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding;2022-11-03
4. Probability-Based DSE of Approximated LUT-Based FPGA Designs;2022 IEEE 15th Dallas Circuit And System Conference (DCAS);2022-06-17
5. Boolean Rewriting Strikes Back: Reconvergence-Driven Windowing Meets Resynthesis;2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC);2022-01-17