A 41-nW SAR ADC with a FIA-based Comparator and a Bulk-driven Latch for ECG Applications
Author:
Affiliation:
1. School of Electronics and Communication Engineering, Guangzhou University,Guangzhou,China
2. Shanghai JiaoTong University,Shanghai,China
Funder
Natural Science Foundation of Guangdong Province, China
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10103932/10103801/10103992.pdf?arnumber=10103992
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1. A 10-bit Charge-Redistribution ADC Consuming 1.9 $\mu$W at 1 MS/s
2. A 43-nW 10-bit 1-kS/s SAR ADC in 180nm CMOS for biomedical applications
3. An energy-efficient comparator with dynamic floating inverter amplifier;t;IEEE J Solid-State Circuits,2019
4. A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time
5. A 0.3-V 0.705-fJ/Conversion-Step 10-bit SAR ADC With a Shifted Monotonic Switching Procedure in 90-nm CMOS
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