AES Sbox Acceleration Schemes for Low-Cost SoCs
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9401028/9401051/09401539.pdf?arnumber=9401539
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Computational-Based Advanced Encryption Standard (AES) Accelerator;2023 International Conference on Microelectronics (ICM);2023-12-17
2. Low area and high throughput implementation of advanced encryption standard hardware accelerator on FPGA using Mux‐Demux pair;SECURITY AND PRIVACY;2022-12-23
3. Design and Implementation of New Collision Resistant Fast Hash Function Family for IoT Healthcare Blockchain Ledger;2022 International Conference on Innovation and Intelligence for Informatics, Computing, and Technologies (3ICT);2022-11-20
4. Methods for improving the implementation of advanced encryption standard hardware accelerator on field programmable gate array‐A survey;SECURITY AND PRIVACY;2022-07-17
5. VLSI Design of Advanced-Features AES Cryptoprocessor in the Framework of the European Processor Initiative;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2022-02
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