An Open-Source 1.44-MS/s 703-μW 12-bit Non-Binary SAR-ADC Using 448-aF Capacitors in 130-nm CMOS
Author:
Affiliation:
1. Institute for Integrated Circuits, Johannes Kepler University Linz,Austria
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10285149/10285150/10285152.pdf?arnumber=10285152
Reference15 articles.
1. A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply
2. A digitally-calibrated 70.98dB-SNDR 625kHzbandwidth temperature-tolerant 2nd-order noise-shaping SAR ADC in 65nm CMOS;yoon;IEEE Asian Solid-State Circuits Conference,2019
3. 10b SAR ADC developed at the University of Alabama;beal,2023
4. An Untrimmed 14-bit Non-Binary SAR-ADC Using 0.37 fF-Capacitors in 180 nm for 1.1 µW at 4 kS/s
5. A Single-Supply Buffer-Embedding SAR ADC with Skip-Reset having Inherent Chopping Capability
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