Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Hardware and Architecture
Cited by
8 articles.
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1. Enhancing Power Efficiency in Branch Target Buffer Design with a Two-Level Prediction Mechanism;Electronics;2024-03-23
2. Branch Target Buffer Organizations;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28
3. Protean: Resource-efficient Instruction Prefetching;Proceedings of the International Symposium on Memory Systems;2023-10-02
4. A Storage-Effective BTB Organization for Servers;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02
5. Impact of microarchitectural state reuse on serverless functions;Proceedings of the Eighth International Workshop on Serverless Computing;2022-11-07