1. A 1.25MHz Bandwidth 86.4dB SNDR third-order VCO-based ADC design;2024 4th International Conference on Electronics, Circuits and Information Engineering (ECIE);2024-05-24
2. Digital Noise-Cancellation Circuit Implementation Using Proposed Algorithm and Karnaugh Map in a MASH 2-1 Delta-Sigma Modulator;Journal of Circuits, Systems and Computers;2022-06-24
3. Frontiers, Trends and Challenges: Towards Next-generation ΣΔ Modulators;Sigma-Delta Converters;2018-09-03
4. Hybrid VCO Based 0-1 MASH and Hybrid ΔΣ SAR;Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design;2017-09-19