A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons-Reference-Cited by-同舟云学术

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A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons

Published:2011-09 Issue: Volume: Page:
ISSN:
Container-title:2011 IEEE Custom Integrated Circuits Conference (CICC)
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Author:

Seo Jae-sun,Brezzo Bernard,Liu Yong,Parker Benjamin D.,Esser Steven K.,Montoye Robert K.,Rajendran Bipin,Tierno Jose A.,Chang Leland,Modha Dharmendra S.,Friedman Daniel J.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6045019/6055276/06055293.pdf?arnumber=6055293

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4. Toward Efficient System-on-Module for Design-Space Exploration of Analog Spiking Neural Networks;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-08

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