USB Transceiver With a Serial Interface Engine and FIFO Queue for Efficient FPGA-to-FPGA Communication-Reference-Cited by-同舟云学术

USB Transceiver With a Serial Interface Engine and FIFO Queue for Efficient FPGA-to-FPGA Communication

Author:

Sung Guo-Ming^ORCID,Tung Li-Fen,Wang Hsin-Kwang,Lin Jhih-Hao

Funder

Ministry of Science and Technology, Taiwan

Chip Implementation Center, Taiwan, for Fabricating the Test Chip

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science

Link

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Implementation and Analysis on FIFO using FPGA;2024 2nd International Conference on Sustainable Computing and Smart Systems (ICSCSS);2024-07-10

3. Research on High-Speed Acquisition Method of LIN Signals Based on FPGA and USB Interface;2023 IEEE International Conference on Electrical, Automation and Computer Engineering (ICEACE);2023-12-29

4. An Implementation of Serial Interface Engine with Transceiver using Verilog HDL;2023 International Conference on Energy, Materials and Communication Engineering (ICEMCE);2023-12-14