A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator

Author:

Pham Hoai LuanORCID,Tran Thi HongORCID,Duong Le Vu TrungORCID,Nakashima YasuhikoORCID

Funder

Japan Science and Technology Agency (JST) under a Strategic Basic Research Programs Precursory Research for Embryonic Science and Technology

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. LiteHash: Hash Functions for Resource-Constrained Hardware;ACM Transactions on Embedded Computing Systems;2024-07-09

2. MRCA: Multi-grained Reconfigurable Cryptographic Accelerator for Diverse Security Requirements;2024 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS);2024-04-17

3. Research on Performance Optimization of Encryption Algorithms for Network Security Framework;Proceedings of the 2024 3rd International Conference on Cyber Security, Artificial Intelligence and Digital Economy;2024-03

4. Universal 32/64-bit CGRA for Lightweight Cryptography in Securing IoT Data Transmission;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18

5. Implementation of a Hash-based Secure Core for Integrity and Authentication of Data in Space Applications on Space-grade FPGAs;2023 IEEE 2nd Industrial Electronics Society Annual On-Line Conference (ONCON);2023-12-08

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