High-Level Synthesis Hardware Design for FPGA-Based Accelerators: Models, Methodologies, and Frameworks-Reference-Cited by-同舟云学术

High-Level Synthesis Hardware Design for FPGA-Based Accelerators: Models, Methodologies, and Frameworks

Author:

Molina Romina Soledad¹^ORCID,Gil-Costa Veronica²,Crespo Maria Liz³^ORCID,Ramponi Giovanni¹^ORCID

Affiliation:

1. Dipartimento di Ingegneria e Architettura (DIA), Università degli Studi di Trieste, Trieste, Italy

2. CONICET, Universidad Nacional de San Luis, San Luis, Argentina

3. Multidisciplinary Laboratory (MLab), The Abdus Salam International Centre for Theoretical Physics, Trieste, Italy

Funder

University of Trieste and the Abdus Salam International Centre for Theoretical Physics

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

Reference190 articles.

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