A Framework for Sensitivity Analysis of Real-Time Power Hardware-in-the-Loop (PHIL) Systems-Reference-Cited by-同舟云学术

A Framework for Sensitivity Analysis of Real-Time Power Hardware-in-the-Loop (PHIL) Systems

Published:2022 Issue: Volume:10 Page:101305-101318
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Lauss Georg¹^ORCID,Feng Zhiwang²^ORCID,Syed Mazheruddin H.²^ORCID,Kontou Alkistis³,Paola Antonio De⁴^ORCID,Paspatis Alexandros³^ORCID,Kotsampopoulos Panos³^ORCID

Affiliation:

1. Austrian Institute of Technology (AIT), Vienna, Austria

2. Institute for Energy and Environment, University of Strathclyde, Glasgow, U.K.

3. School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), Athens, Greece

4. Joint Research Centre (JRC), European Commission, Ispra, Italy

Funder

Horizon 2020 Framework Programme

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/6287639/9668973/09893124.pdf?arnumber=9893124

Reference30 articles.

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2. Real-Time Power-Hardware-in-the-Loop Implementation of Variable-Speed Wind Turbines

3. Power Hardware-in-the-Loop Simulation Study on Frequency Regulation Through Direct Load Control of Thermal and Electrical Energy Storage Resources

4. Improve the Stability and the Accuracy of Power Hardware-in-the-Loop Simulation by Selecting Appropriate Interface Algorithms

5. Comparing the Dynamic Performances of Power Hardware-in-the-Loop Interfaces

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