A Biasing Approach to Design Ultra-Low-Power Standard-Cell-Based Analog Building Blocks for Nanometer SoCs
Author:
Affiliation:
1. Department of Information, Electronics and Communications Engineering, Sapienza University of Rome, Rome, Italy
2. Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), University of Catania, Catania, Italy
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
General Engineering,General Materials Science,General Computer Science
Link
http://xplorestaging.ieee.org/ielx7/6287639/9668973/09729210.pdf?arnumber=9729210
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