Analysis and Suppression of High Speed Dv/Dt Induced False Turn-on in GaN HEMT Phase-Leg Topology-Reference-Cited by-同舟云学术

Analysis and Suppression of High Speed Dv/Dt Induced False Turn-on in GaN HEMT Phase-Leg Topology

Author:

Long Xiao^ORCID,Jun Zhao,Pu Li,Chen Dongdong,Liang Wu

Funder

Nature Science Foundation of Liaoning Province and State Key Laboratory of Synthetical Automation for Process Industries Northeast University

Young and Middle Aged Project of Education Department Fujian Province

Science and Technology Planning Project of Quanzhou City Fujian Province

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science

Link

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. Evaluation of GaN HEMT dv/dt Immunity and dv/dt Induced False Turn-On Energy Loss;2024 IEEE Applied Power Electronics Conference and Exposition (APEC);2024-02-25

3. Minimization of parasitic capacitance for proper function of 3 level ANPC with GaN switches;2023 25th European Conference on Power Electronics and Applications (EPE'23 ECCE Europe);2023-09-04