Development of Laboratory Test Method to Perform Artificial Pollution Test on Composite Insulators Intended for HVDC Applications by Solid Layer Method-Reference-Cited by-同舟云学术

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Development of Laboratory Test Method to Perform Artificial Pollution Test on Composite Insulators Intended for HVDC Applications by Solid Layer Method

Published:2024-02 Issue:1 Volume:31 Page:439-447
ISSN:1070-9878
Container-title:IEEE Transactions on Dielectrics and Electrical Insulation
language:
Short-container-title:IEEE Trans. Dielect. Electr. Insul.

Author:

Rajamani P.¹^ORCID,Aravind K. A.¹,Rao K. Rajeshwara¹,Krishna B.¹,Urukundu K.¹,Rao K. Devender¹,Nirgude Pradeep M.¹

Affiliation:

1. UHV Research Laboratory, Central Power Research Institute (CPRI), Hyderabad, India

Funder

Central Power Research Institute (CPRI) through the In-House Research and Development Program

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/94/10415316/10227312.pdf?arnumber=10227312

Reference17 articles.

1. Artificial pollution tests on high-voltage insulators to be used on a.c. systems

2. Dimensioning of DC composite insulators for polluted area: Case study for recent CIGRE/IEC approach;Gutman

3. Statistical approach for the insulation dimensioning of the 500 kV HVDC line in Scandinavia;Gutman

4. HVDC pollution testing of insulation: experience from service, laboratory and test station

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