RISC-VTF: RISC-V Based Extended Instruction Set for Transformer-Reference-Cited by-同舟云学术

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RISC-VTF: RISC-V Based Extended Instruction Set for Transformer

Published:2021-10-17 Issue: Volume: Page:
ISSN:
Container-title:2021 IEEE International Conference on Systems, Man, and Cybernetics (SMC)
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Author:

Jiao Qiang,Hu Wei,Liu Fang,Dong Yong

Funder

Hubei Provincial Department of Education

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9658572/9658575/09658643.pdf?arnumber=9658643

Reference16 articles.

1. Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks

2. Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks

3. DaDianNao: A Neural Network Supercomputer

4. PuDianNao

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An FPGA-Based Efficient Streaming Vector Processing Engine for Transformer-Based Models;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

2. Latency-Constrained Neural Architecture Search Method for Efficient Model Deployment on RISC-V Devices;Electronics;2024-02-08

3. Enhancement in IoT through Custom Instruction Set Architectures and TinyML: Review;2023 International Conference on Computer, Electronics & Electrical Engineering & their Applications (IC2E3);2023-06-08

4. RISC-V Instruction Set Architecture Extensions: A Survey;IEEE Access;2023

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