Optimal core wrapper width selection and SOC test scheduling based on 3-D bin packing algorithm
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Publisher
IEEE
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http://xplorestaging.ieee.org/ielx5/8073/22329/01041747.pdf?arnumber=1041747
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1. Study on Minimum Annual Electricity Bill of a Campus Microgrid Using the Sparrow Search Algorithm and Bin Packing Method;2023 9th International Conference on Control, Decision and Information Technologies (CoDIT);2023-07-03
2. Power-aware partitioning and test time reduction for 3D-SoC;Innovations in Systems and Software Engineering;2022-09-06
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4. Designing balanced wrapper chains in 3D SoC under constrained TSVs;Innovations in Systems and Software Engineering;2021-05-25
5. Test Time Reduction of 3-D Stacked ICs Using Ternary Coded Simultaneous Bidirectional Signaling in Parallel Test Ports;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-12
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