A High-Linear PLL-based FMCW Frequency Synthesizer with 42-kHz rms FM Error and 1.2-GHz Chirp Bandwidth
Author:
Affiliation:
1. East China Normal University,Institute of Microelectronic Circuits and Systems,Shanghai,China
2. University of Houston,Department of Electrical and Computer Engineering,Houston,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10522823/10522798/10522860.pdf?arnumber=10522860
Reference8 articles.
1. Linearity study of DDS-based W-band FMCW sensor
2. Multiplexed Twin PLLs for Wide-Band FMCW Chirp Generation in 130-nm BiCMOS
3. A 22.5–31.2-GHz Continuously Tuning Frequency Synthesizer With 8.7-GHz Chirp for FMCW Applications
4. Technique for fast triangular chirp modulation in FMCW PLL
5. A 32-GHz Nested-PLL-Based FMCW Modulator With 2.16-GHz Bandwidth in a 65-nm CMOS Process
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