A Low Power 10-Bit Time-to-Digital Converter Utilizing Vernier Delay Lines
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6527367/6527368/06527517.pdf?arnumber=6527517
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Time-to-Digital Converters: A Literature Review and New Perspectives;2019 5th International Conference on Event-Based Control, Communication, and Signal Processing (EBCCSP);2019-05
2. A Low-Power High-Linear Time-to-Digital Converter for Measuring R-R Intervals in ECG Signal Optimized by Neural Network and TLBO Algorithm;Journal of Circuits, Systems and Computers;2018-11-12
3. Strategyproof Linear Regression in High Dimensions;Proceedings of the 2018 ACM Conference on Economics and Computation;2018-06-11
4. An accurate time-to-digital converter based on a self-timed ring oscillator for on-the-fly time measurement;Analog Integrated Circuits and Signal Processing;2018-06-05
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